[计] 存储器总线
... 动态RAM,DRAM 存储器总线(memory bus) 一个指令:move A,%eax ...
内存总线
TC6380AF/XB以标准内存总线(memory bus)作为主界面,可以控制SD内存卡和智能卡,采用了CPRM(Content Protection for Recordable Media,是SDMI 认可的音乐著作权保护形...
存储栖线
... memory buffer register 记忆缓冲缓存器 memory bus 存储栖线 memory bus 记忆总线 ...
记忆总线
... memory buffer register 记忆缓冲缓存器 memory bus 记忆总线 memory cache base object 内存快取基底对象 ...
处理器通过内存总线连接到物理内存。
NUMA reduces the contention for a system's Shared memory bus by having more memory buses and fewer processors on each bus.通过使用更多的内存总线,并令每条总线上处理器更少,NUMA减少了系统共享内存总线的冲突。
Off-chip memory latency is mainly determined by DRAM latency, and memory bandwidth is determined by data transfer rate through the memory bus.片外存储系统的访存延迟主要由DRAM延迟决定,带宽则是由内存总线的数据传输率所决定。